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Renesas Electronics /R7FA2L1AB /SYSC /DCDCCTL

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Interpret as DCDCCTL

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7 43 0 0 00 0 0 0 0 0 0 0 0 (0)DCDCON 0 (0)OCPEN 0 (0)STOPZA 0 (0)LCBOOST 0 (0)FST 0 (0)PD

STOPZA=0, FST=0, DCDCON=0, OCPEN=0, LCBOOST=0, PD=0

Description

DCDC/LDO Control Register

Fields

DCDCON

LDO/DCDC on/off Control bit

0 (0): LDO is on and DCDC is off

1 (1): LDO is off and DCDC is on
OCPEN

DCDC OCP Function Enable bit

0 (0): DCDC OCP (Over Current Protection) Function disable

1 (1): DCDC OCP (Over Current Protection) Function enable
STOPZA

DCDC IO Buffer Power Control bit

0 (0): DCDC IO buffer power down

1 (1): DCDC IO buffer power up
LCBOOST

LDO LCBOOST Mode Control bit

0 (0): LDO power mode is other than LCBOOST

1 (1): LDO power mode is in LCBOOST
FST

DCDC Fast Startup

0 (0): Fast startupBecause it is a circuit-oriented expression, it is hard to understand. Reexamination of expression is necessary.

1 (1): Not fast startupBecause it is a circuit-oriented expression, it is hard to understand. Reexamination of expression is necessary.
PD

DCDC VREF Generate Disable bit

0 (0): DCDC VREF BIAS output enable

1 (1): DCDC VREF BIAS output disable

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Register License

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data